Staff/Principal Design Engineer
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Position Overview & Specifications
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As part of Arm’s continued growth, the Interconnect team are looking to hire passionate engineers in the Bristol region. Based in an office in Bristol, you will be working on next generation Interconnect products in close collaboration with the Manchester and Sheffield teams. The team is working on a new Arm Corelink Interconnect IP product for Arm, with sophisticated bleeding edge low power, high performance technology. Would you like to be part of creative, multi-disciplinary, multi-cultural environment, in a role with exciting responsibilities and a chance to create an impact on our industry? We would love to hear from you! The Interconnect team develops the Arm Corelink Interconnect IP family. This highly scalable IP is designed for intelligently connected AMBA-compliant SoC connectivity, for other performance features including coherency, caches and can be customized for multiple performance points. Design Engineers are required to have in-depth understanding across all the elements that contribute to the products’ successful delivery, including low-power design techniques, awareness of the impact of design decisions on system performance, ability to produce designs that are area efficient, and the verification techniques that are employed to ensure high-quality cutting edge designs. Responsibilities:- Leading the feasibility analysis of suggested architectures and algorithms to craft creative microarchitecture design solutions and specifications in collaboration with other specialists
- Driving the power measurement and design optimization activities working with stakeholders while tracking the requirements
- Work closely with engineers across performance modelling, validation, and implementation to meet all functional requirements, performance, power and area goals
- Improving design methodology across the System IP group and wider Arm design community
- Providing direction and mentoring to other members of your team as they learn new things and solve complex problems.
- Demonstration of a strong delivery record of high quality, low power, high performance complex micro-architecture and RTL implementations using System Verilog, Verilog or VHDL HDL in reasonable timescales.
- Be able to navigate and make high-level design trade-offs and articulate the rationale for those choices.
- Knowledgeable on ASIC/FPGA design methodology, IP signoff methods with a deep understanding on timing/area/complexity trade-offs for complex data path designs
- Experience of producing specifications and documentation describing complex designs
- Multiprocessing microarchitecture experience including knowledge of cache coherence and bus protocols (e.g. AMBA5 CHI, AMBA4 ACE or AXI)
- Team leadership and mentoring experience
- CPU or compute subsystem memory micro-architecture
- Working knowledge of SystemVerilog Assertions (SVA) and formal verification
- Knowledge of a scripting language such as Perl, Tcl, C shell
- Knowledge of working with power tools (ex. Power Pro)
- Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. SystemVerilog
Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of any characteristic.
Hybrid Working at ArmArm’s hybrid approach to working is centred around flexibility, where we split our time between the office and other locations to get our work done. We empower groups/teams to determine their hybrid working pattern, with an expected minimum attendance in the office of 20% per month, depending on the work, level of experience and team’s needs. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution.
Candidate Selection & Onboarding Process
Application & Resume Screening
Submit your tailored CV/Resume directly to the talent acquisition portal.
Technical & Competency Interviews
Virtual interviews with the hiring manager and multidisciplinary team.
Formal Offer & Benefits Negotiation
Written agreement outlining compensation, equity, retirement vesting, and relocation allowances.
Onboarding & Corporate Integration
Equipment provisioning, team orientation, and commencement of duties.
United Kingdom Right to Work & Skilled Worker Visa Guide
Employment in the United Kingdom requires legal Right to Work verified under the Home Office Points-Based Immigration System:
Sponsoring employers must hold an active Home Office A-rated Sponsor License and assign a valid Certificate of Sponsorship (CoS). Role must meet the general minimum salary threshold (£38,700) or occupation going rate.
Continuous employment under Skilled Worker status establishes eligibility for Indefinite Leave to Remain (ILR) after 5 continuous years, leading to British Citizenship.
Candidate Preparation Blueprint: Computer Hardware Development
Based on transatlantic hiring benchmarks for Staff/Principal Design Engineer roles across Arm's corporate sector, successful applicants typically excel across three core dimensions:
Demonstrated portfolio evidence, architecture/system design case studies, or validated professional certifications directly applicable to Computer Hardware Development.
STAR method competency responses highlighting cross-functional leadership, conflict resolution, and delivering measurable enterprise ROI under tight timelines.
Total compensation expectation aligned within the benchmarked £44,077 - £69,000 bracket, including retirement vesting and health parity.
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